| upper dword |
lower dword |
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6 3 | 6 2 | 6 1 | 6 0 | 5 9 | 5 8 | 5 7 | 5 6 | 5 5 | 5 4 | 5 3 | 5 2 | 5 1 | 5 0 | 4 9 | 4 8 | 4 7 | 4 6 | 4 5 | 4 4 | 4 3 | 4 2 | 4 1 | 4 0 | 3 9 | 3 8 | 3 7 | 3 6 | 3 5 | 3 4 | 3 3 | 3 2 | 3 1 | 3 0 | 2 9 | 2 8 | 2 7 | 2 6 | 2 5 | 2 4 | 2 3 | 2 2 | 2 1 | 2 0 | 1 9 | 1 8 | 1 7 | 1 6 | 1 5 | 1 4 | 1 3 | 1 2 | 1 1 | 1 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | bit offset
|
Base 31:24 |
G
| D B
| L
| ⋰
| Limit 19:16 |
P
| DPL
| S
| Type |
Base 23:00 |
Limit 15:00 |
General format |
Base 31:24 |
G
| B
| 0
| ⋰
| Limit 19:16 |
P
| DPL
| 1
| 0
| E
| W
| A
| Base 23:00 |
Limit 15:00 |
Data Segment |
Base 31:24 |
G
| D
| 0
| ⋰
| Limit 19:16 |
P
| DPL
| 1
| 1
| C
| R
| A
| Base 23:00 |
Limit 15:00 |
Code Segment (16-/32-bit) |
| Reserved
| G
| D
| 1
| ⋰
| Reserved
| P
| DPL
| 1
| 1
| C
| R
| A
| Reserved
| Code Segment (IA-32e) |
Base 31:24 |
G
| R
| 0
| R
| Limit 19:16 |
P
| DPL
| 0
| Type |
Base 23:00 |
Limit 15:00 |
System Segment |
Offset in Segment 31:16 |
P
| DPL
| 0 |
1100 |
0 |
0 |
0 |
Param count |
Segment selector |
Offset in Segment 15:00 |
Call Gate (32-bit) |
Offset in Segment 31:16 |
P
| DPL
| 0 |
1100 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Segment selector |
Offset in Segment 15:00 |
Call Gate (IA-32e) |
| Reserved |
0000 |
Reserved |
Offset in Segment 63:31 |
64-bit Call Gate extension (at 8 byte offset) |
Offset in Segment 31:16 |
P
| DPL
| 0 |
D
| 1 |
1 |
0 |
0 |
0 |
0 |
Reserved |
Segment selector |
Offset in Segment 15:00 |
Interrupt Gate |
Offset in Segment 31:16 |
P
| DPL
| 0 |
D
| 1 |
1 |
1 |
0 |
0 |
0 |
Reserved |
Segment selector |
Offset in Segment 15:00 |
Trap Gate |
| Reserved |
P
| DPL
| 0 |
D
| 1 |
0 |
1 |
Reserved |
TSS Segment selector |
Reserved |
Task Gate |
Base 31:24 |
G
| 0
| 0
| ⋰
| Limit 19:16 |
P
| DPL
| 0
| Type |
Base 23:00 |
Limit 15:00 |
TSS/LDT Descriptor |